Product Summary

The S3C2410A-26-YO80 is a 32-Bit RISC Microprocessor. The S3C2410A-26-YO80 was developed using an ARM920T core, 0.18um CMOS standard cells and a memory complier. Its low-power, simple, elegant and fully static design is particularly suitable for cost- and power-sensitive applications. It adopts a new bus architecture called Advanced Microcontroller Bus Architecture (AMBA).

Parametrics

S3C2410A-26-YO80 absolute maximum ratings: (1)DC Supply Voltage:2.7V; (2)DC Input Voltage:2.7V; (3)DC Output Voltage:3.8V; (4)DC Input (Latch-up) Current:±200mA; (5)Storage Temperature:-65 to 150℃.

Features

S3C2410A-26-YO80 features: (1)1.8V/2.0V int., 3.3V memory, 3.3V external I/O microprocessor with 16KB I-Cache/16KB D-Cache/MMU; (2)External memory controller (SDRAM Control and Chip Select logic); (3)LCD controller (up to 4K color STN and 256K color TFT) with 1-ch LCD-dedicated DMA; (4)4-ch DMAs with external request pins; (5)3-ch UART (IrDA1.0, 16-Byte Tx FIFO, and 16-Byte Rx FIFO) / 2-ch SPI; (6)1-ch multi-master IIC-BUS/1-ch IIS-BUS controller; (7)SD Host interface version 1.0 & Multi-Media Card Protocol version 2.11 compatible; (8)2-port USB Host /1- port USB Device (ver 1.1); (9)4-ch PWM timers & 1-ch internal timer; (10)Watch Dog Timer; (11)117-bit general purpose I/O ports / 24-ch external interrupt source; (12)Power control: Normal, Slow, Idle and Power-off mode; (13)8-ch 10-bit ADC and Touch screen interface; (14)RTC with calendar function; (15)On-chip clock generator with PLL.

Diagrams

S3C2410A-26-YO80 block diagram

S3C2400
S3C2400

Other


Data Sheet

Negotiable 
S3C2410A
S3C2410A

Other


Data Sheet

Negotiable 
S3C2410X
S3C2410X

Other


Data Sheet

Negotiable 
S3C2412XL-26
S3C2412XL-26

Other


Data Sheet

Negotiable 
S3C2440A
S3C2440A

Other


Data Sheet

Negotiable 
S3C2440A-40-YQ80
S3C2440A-40-YQ80

Other


Data Sheet

Negotiable