LM3S3651-IQR50-A0

Product Summary

The LM3S3651-IQR50-A0 is a microcontroller. It is based on the ARM Cortex-M3 controller core operating at up to 50 MHz, with 128kB flash, 32kB SRAM, a 32-ch DMA, and ROM preloaded with the StellarisWare Driver Library and Boot Loader. The LM3S3651-IQR50-A0 also features real-time industrial connectivity, with USB 2.0 Full Speed OTG/Host/Device, an SSI / SPI controller, an I2C interface, and a UART. The microcontroller also features intelligent analog capability, including 2 analog comparators and 4 channels of highly accurate 10-bit analog-to-digital conversion - with the ability to sample at speeds of 500K samples per second. Finally, the LM3S3651-IQR50-A0 provides a 24-bit systick timer, 4 32-bit or 8 16-bit general-purpose timers, a watchdog timer, a battery-backed hibernation module with RTC and 256 bytes of non-volatile state-saving memory, a low drop-out voltage regulator so that only one supply voltage is required, brown-out reset, power-on reset controller, and up to 33 GPIOs.

Parametrics

LM3S3651-IQR50-A0 absolute maximum ratings: (1)Max Speed: 50MHz ; (2)SRAM: 32KB; (3)Motion PWM: 0; (4)QEI: 0; (5)GPIOs: 33; (6)Operating Temperature Range: -40℃ to 85℃; (7)Maximum 5-V Tolerant GPIOs: 33; (8) ADC Sample Rate: 500kSPS; (9) Pin/Package 64LQFP; (10) Flash: 128KB.

Features

LM3S3651-IQR50-A0 features: (1)32-bit ARM Cortex-M3 50-MHz processor core with System Timer (SysTick), integrated Nested Vectored Interrupt Controller (NVIC), Memory Protection Unit (MPU), and Thumb-2 instruction set; (2)Full-featured debug solution with debug access via JTAG and Serial Wire interfaces, and IEEE 1149.1-1990 compliant Test Access Port (TAP) controller; (3)128 KB single-cycle flash and 32 KB single-cycle SRAM; (4)Internal ROM loaded with StellarisWare software; (5)Lower-power battery-backed Hibernation module with Real-Time Clock; (6)ARM Prime Cell 32-channel configurable μDMA controller; (7)0-33 GPIOs (depending on configuration) with programmable control for GPIO interrupts and pad configuration; (8)ARM FiRM-compliant Watchdog Timer; plus four General-Purpose Timer Modules (GPTM), each of which provides two 16-bit timers/counters and can be configured to operate independently; (9)10-bit Analog-to-Digital Converter (ADC) with four analog input channels and a sample rate of 500 thousand samples/second; (10)Fully programmable 16C550-type UART with IrDA support ; (11)Synchronous Serial Interface (SSI), supporting operation for Free scale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces; (12)Inter-Integrated Circuit (I2C) Interface, providing Standard (100 Kbps) and Fast (400 Kbps) transmission and support for sending and receiving data as either a master or a slave; (13)Universal Serial Bus (USB) Controller with USB 2.0 full-speed (12 Mbps) and low-speed (1.5 Mbps) operation, 8 endpoints, and USB On-The-Go (OTG) mode; (14)Two integrated analog comparators configurable for output to initiate an ADC sample sequence, drive an output pin or generate an interrupt; (15)Industrial-range 64-pin RoHS-compliant LQFP package.

Diagrams